[xuanlang]

in reply to: FLEXCASE E 2.1 SPI Communication CLOCK Problem #18475

Hi Amir,

Currently the result is tested with defining the CS pin as GPIO and our software control the CS pin manually with DIO API (custom CS)

I am setting SpiShiftClockIdleLevel= HIGH (CPOL) and SpiDataShiftEdge = LEADING (CPHA) for mode3. I did not find the SpiSamplePoint config parameter in the config tool (s32ConfigTools2022R1.6)

The clock jitter only happened when I used SpiShiftClockIdleLevel= HIGH (CPOL) and across different hardware.

Do you have an example spi file that use Mode3 but does not have the clock jitter?

Thanks,
Xuanlang

[xuanlang]

in reply to: FLEXCASE E 2.1 SPI Communication CLOCK Problem #18438

My Tool Chain is MATLAB2022B + NXP S32k3 MBDT 1.3

[xuanlang]

in reply to: FlexCase Relay Drive Stop Working #17383

Hi Rhyse,

How can we confirm is the MOSFET problem? From the repair guide you sent, it will require to open up the case. Are there any other reason that will cause the highside drive to stop working?

Thanks,

[xuanlang]

in reply to: FlexCase Relay Drive Stop Working #17377

Hi Audesse Team,

Here are more detail for this question: We were using the high side drive to enable a small automotive grade 12v relay. The noise from the relay over time seems to have damaged the high side drive. The damage caused the source to be driven from source back through the gate pin and potentially being fed back into the microcontroller. The microcontroller seems fine but we are unsure if there was any damage actually done to it. The relay did have a suppression diode, but it was clamping voltages just at or 1 to 2V above with the Mosfet/ High side drive was rated for.

can you give us some of the failure modes you have seen with these high side drives being damaged that you have experienced.

Can you also send the repair guide to my email?

Thanks,
Xuanlang

[Author]

Posts